K-transistor topology - Novel process-resilient transistor circuit topology for applications in the extremely low supply voltage range
Ref.-No. 7262
Keywords: Topology, transistor, logic gates, FEOL-corner, process variability, energy-efficient, architecture, circuit
Semiconductor circuits are now an indispensable part of many areas of life as the basis for electronic components. Energy efficiency is often essential in this context. One of the biggest hurdles in the development of circuit topologies with low supply voltages is high process variability. At Bielefeld University, a novel circuit topology has been developed that enables operation with extremely low supply voltages – regardless of the type of transistors used.
This creates an exceptionally high degree of technological openness. Doubling the number of transistors allows N-FETs and P-FETs to be connected in a special way, which reduces the process variations of the respective transistor types and lowers the effects of FEOL (front-end-of-line) corners.
The resulting increase in leakage currents is partially compensated for by the existing Schmitt trigger logic. Despite the increased number of transistors, space efficiency is maintained because more compact transistors can be used, resulting in extremely low space requirements. All multi-input gates have inputs from the custom AND-N and/or OR-N gate. These, especially the two input gates, are designed directly at the topological level so that the output voltage and power are symmetrical when the input combination is swapped.
The invention comprises a standard cell library that can be used to create modular, space-efficient cell libraries.
Competitive Advantages
- Extremely low space requirements
- Energy efficient
- Process resilient
- For low supply voltages
- Process-variable use
Commercial Opportunities
Thanks to a supply voltage of less than 0.2 V (upper limit for 22 nm FDSOI process) – significantly below the current state of the art of around 0.7 V – circuits based on this topology significantly reduce energy consumption. Corresponding components would mainly be used in devices that require low energy consumption.
The topology greatly increases resistance to process variations. Examples would be sensors that are powered by a battery or energy harvesting. Attractive areas of application lie in the digital future field of the ‘Internet of Things,’ wearables, or bioimplants.
Current Status
Initial simulations confirming the functionality have been carried out. In addition, the reduction in process variability has also been mathematically proven. A German patent application has been filed. We offer interested companies the opportunity to further develop the technology with the inventors at the university or to license the technology.
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Technology concept formulated
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An invention from the University of Bielefeld.
